Encoder



ENCODER Original Filed Nov. 29, 1962 I l2 Sheets-Sheet 1 30, 1970 J. P. NlcKLAs ETAL 3,518,660

ENCODER 2 Sheets-Sheet :3

Original Filed Nov. 29 1962 M z T m Km T PEI@ O G 5 m Vl W Kim s R l.' MP4@ /N GNT md {N Mg kim Nm #4@ W2@ MEG A@ 0%: w 2% Nm 5x53 l m53@ 50d i L .I .Il 1+-- l J l I. Y@ z -2 --z n .W N O .36m gsm 5g@ 56m 9am @um $45 n Nw, N .m .am .um I r LrlnLrlIl um am m am. 4 um, A n o r i ,L m *Y n...- a IEWWN- amb/ 300. 1| I moso nw\ .wwa Hm N Poo 5 M. .mm N Praio N INN ZOQNZQEOQ N whwmd 20a IrXwZ N Ou 025340 O\ a 429m NEQSOU QZZQ@ 4 OuPzOL.

NETS) a OU GN PSQZ,

.mDOO

United States Patent O 3,518,660 ENCODER James P. Nicklas, Woodland Hills, Calif., and Robert H. Stotz, Boston, Mass., assignors to B-R Corporation, a corporation of Delaware Original application Nov. 29, 1962, Ser. No. 240,842, now Patent No. 3,291,910, dated Dec. 13, 1966. Divided and this application June 8, 1966, Ser. No. 565,362 Int. Cl. H03k 13/02 U.S. Cl. 340-347 4 Claims `ABSTRACT OF THE DISCLOSURE Apparatus for converting different symbols each manifested by a different physical representation, such as a typewriter key, into a desired electrical code using a shift register having stages associated with respective ones of the symbols to be converted. The shift register is shifted in synchronism with an output counter which counts in the desired output code. When the shift register stage which is set in accordance with the symbol to be converted is shifted out of the shift register, the counting of the output counter is terminated, the count then indicated thereby being'the required output code for the signal -being converted. The invention also provides for terminating the counting of the output counter only in response to the shifting out of the second of two set stages of the shift register so as to permit conversion of a symbol which may have two possible forms, such as the `upper and lower cases of a typewriter key.

This is a division of application Ser. No. 240,842,

led Nov. 29, 1962 now Pat. No. 3,291,910, issued Dec. 13, 1966. This invention relates to apparatus for converting data, which is being producedin one form, into a code suita- Ible for use in a computer,'as well as the reciprocal operation thereof, and more particularly to improvements in this type of apparatus.

One of the input devices presently employed with present day computers is the typewriter. Computers sometimes also use a typewriter as an output device where high speed output printing is not required. There are a number of different arrangements for converting the mechanical actuation of a typewriter key into a code which the computer can process. These may be by way of photoelectric detection, actual mechanical switch contacts which are selectively'actuated or other arrangements. Another favored method for entering data from a' typewriter into a computer or for operating the typewriter from the computer is to useV a teletypewriter arrangement and then convert the teletypewriter code into computer code, as well as vice versa.

All these previously known typewriter encoding and decoding arrangements are complex, requiring complex typewriter construction as well as expensive associated electronic equipment.

An object of this invention is the provision of a simple arrangement for encoding the data typed by a typewriter, and also for performing the reciprocal process.

Another object of this invention is the provision of a novel arrangement for converting the actuation of a typewriter key into a representative code as well as for performing the reciprocal process.

Yet another object of this invention is the provision of a relatively trouble-free and inexpensive encoding and decoding system.

These and other objects of the invention may be achieved in an arrangement wherein a shift register is provided together with a counter. Each key on the typewriter can be made capable of designating both upper and lower case characters or only lower case characters. Keys capable of designating two characters are each associated with two shift register stages. While keys capable of designating only one character are associated with only one shift register stage. The more general case where all keys are capable of designating two characters will hereafter be assumed. One of the two shift register stages designates the lower case character (e.g., numbers) and the other the upper case character (symbols). Thus, when a key of the typewriter is actuated, the associated shift register stages are actuated to store unique binary signals therein. Thereafter, a source of clock pulses starts the shift register shifting serially and simultaneously energizes a counter to commence counting. A sensing circuit is provided at the output of the shift register which detects when the stored binary signals reach the end of the shift register. If the shift key or upper case designating key of the typewriter has been actuated, then appropriate means cause the binary signal representing the lower case character to be disregarded. Upon detection of the proper binary signal at the output of the shift register, shifting ceases and further pulses are prevented from being applied to the counter. At that time the count in the counter represents the code equivalent of either the upper or lower case character designated by the key which had .been depressed on the typewriter. This is sensed and either stored on tape for subsequent entry or if desired may be directly introduced into a computer. Operation of the next key on the typewriter resets the counter and enables the encoding operation for the actuated key to commence again.

For performing the decoding process, coded signals representing a character desired to be printed by the typewriter are entered from the computer into a register. At the same time a single binary signal is introduced into'the first stage of a shift register. Clock pulses are then applied to a counter and also to the shift register to cause it to commence shifting the binary signal through the successive stages. The counter functions to count the applied pulses. This operation continues until the comparator provides an output indicative of the fact that the count in the counter and the code in the register are identical. The comparator output prevents further counting and shifting, clears the counter, and enables a gate associated with the stage of the shift register to which the binary signal has been advanced to provide an output. The gate has its output connected to a solenoid which actuates the typewriter key. If the binary signal has been advanced to the stage of the shift register associated with upper case representation of the character then not only is the character key on the typewriter actuated but also the shift or upper case key is actuated. In this manner the typewriter can print the character which the computer has provided.

Other objects and advantages, which will subsequently become apparent, reside in the details of circuitry and operation as more fully hereinafter described and claimed, further reference being made to the accompanying drawings forming a part hereof, wherein like identifying numerals refer to like parts throughout the several figures, and in which:

FIG. 1 is a block schematic diagram of an encoder in accordance with this invention.

FIG. 2 is a block schematic diagram of a decoder in accordance with this invention.

Referring now to FIG. 1 there may be seen a block diagram of an embodiment of the invention for converting an actuated typewriter key into a code suitable for use by a computer. Each typewriter key, in accordance with this invention, when actuated, is required to close a Switch. Typewriters with this capability and structure are well known. These single-pole single-throw switches are represented by switch symbols in FIG. 1 which have the designations a, b, c z, to correspond to the key on the typewriter whereby these switches may be closed. There is also shown a Switch in FIG. 1 labeled shift This switch is actuated when the key on the typewriter which causes the typewriter to print the upper case representation of a selected character, is actuated. There is also a switch labeled common This switch is closed when any of the switches a to z are closed.

All the switches a, b, c z and shift, have one terminal connected to a pulse source 10. The other side of each one of the character representing switches is connected to one or two stages of a shift register 12. Thus the a switch is connected to the shift register stage 1 and to the shift register stage N-Z. The other side of the b switch is connected to the shift register stage 2 and the shift register stage N-l. Should a character key, such as the one associated with switch a for example, be actuated, then a pulse from the pulse source is applied to the shift register stage 1 and the shift register stage N-Z so as to effectively introduce a binary signal into each of these stages. Should the shift key and its associated switch be actuated, it operates to reset a flipflop 14. However, the situation will first be considered where the shift switch is left unoperated.

The common switch, which is activated concurrent With the actuation of the switches a, b, c, etc., causes a flip-flop circuit 16 to be driven to its reset state by the pulse received from the pulse source 10. When flip-flop 16 is driven to its reset state, it applies its output to a gate 18 which also has applied thereto pulses from the clock pulse source 20. Gate 18 is opened by the flip-flop 16 reset output and applies pulses to the shift register 12 to cause it to commence serially shifting its contents. Pulses from the gate 18 are also applied to a counter 22 to cause it to commence counting in a forward direction.

The shift register will continue shifting and the counter Will continue counting until the first binary signal is shifted from the last stage of the shift register 12 into gate 24. The output of the gate 24 is applied to a gate 26 which will be open to provide an output only when the flip-flop 14 is in its set state. The gate 26 applies its output to the flip-flop 16 driving this flop-flop to its set state whereby gate 18 is closed and the counter 22 is prevented from increasing its count and the shifting is terminated. The count in the counter at this time is the code representation of the character which had been selected by actuation of the key on the typewriter. Each one of the counter outputs is applied to a different gate respectively 31, 32 S04-n. The output from the gate 26 enables all of these gates whereby the count in the counter 22 is sensed. The output from the various gates may then be applied to a storage medium for subsequent introduction into the computer or may be introduced directly into the computer as the code representation of a character selected by the typewriter key.

The counter 22 may be any type which counts in accordance with the code employed by the computer. Thus it may be a strictly binary counter, a binary coded decimal counter, or a Gray code counter, etc. The assignment of a code for a particular input character is made by the appropriate correction of the switches to the shift register positions once the counter sequence is defined.

Assume now that it is desired to type a character on the typewriter in upper case form and also to enter this fact into the computer. Again asume that the key associated with switch a is depressed but this time in conjunction with the shift or upper case key. The shift key resets the flip-flop 14. The common contact resets flipflop 16 which applies an output to a reset pulse generator 40, and also which enables the gate 18. The reset pulse generator 40 applies a single pulse to reset the counter 22 to its initial count condition. The pulse source 10 enters a binary bit into the shift register stage 1 and the shift register stage N-2. Pulses from the clock pulse source 20 advance the shift register and also advance the counters 22. When the binary bit in the N-Z stage of the shift register is applied to the gate 24, gate 24 applies its output to gate 26. At this time however, since gate 26 is not receiving a set output from the flip-flop 14 it remains closed and therefore the lower case representation of the key selected on the keyboard of the typewriter is disregarded. The output of gate 24 at this time, however, serves to drive the tiip-flop |114 to its set state. This set state is reached at a time after the succeeding clock pulse has shifted the shift register and therefore the output from the shift register which initiated the setting operation of flip-flop 14 is removed before the fiip-flop can attain its set state. Therefore, unless the succeeding shift register stage stored a binary one bit gate 26 will not emit an output. Gate 26 remains closed until the next binary bit, representing the upper case representation of the selected character, reaches the last stage of the shift register. At this time the operation previously described occurs. That is, no more clock pulses are applied to the shift register or to the counter and the counter output is entered into the computer.

The operation of the described circuitry occurs at a suliiciently high speed so that as faras the typist is concerned typing can continue at normal speeds and no slow down, because of the association with the encoder, is required.

Referring now to FIG. 2 there may be seen an arrangement for converting a computer code into a form which can actuate the keys on a typewriter to print out the code. Typewriter keys a, b, c z and shift are represented in FIG. 2 as switches. Associated with each one of the keys is an individual solenoid respectively, 42A, 42B, 42C, l42Z and 42 shift. A shift register 44, which may be the identical shift register as the one shown in FIG. 1 is employed. Each two shift register stages which correspond to and are associated with a typewriter key have their outputs connected to a different gate. Thus, for example, shift register stage 1 and shift register N-2 have their outputs connected to a gate 52A. The outputs of all the upper case represented shift register stages are all also connected to a gate 52 shift. A diode 54 is connected between the output of shift register stage 1 and shift register stage N-2 to prevent the output from the shift register stage N-2 from falsely operating the shift gate 52 shift. Similarly, a separate blocking diode serves to connect the output of each upper case representing shift register stage to the output of its associated lower case representing shift register stage.

Thus, by way of further example, since the shift register stages N1 and 2 were respectively associated with the lower and upper case B, then these two shift register stages have their outputs connected to the input togate 52B. A diode 56 is placed between the output of shift register stage 2 and the output of shift register stage N-1. A connection is made to gate 52 shift from the side of the diode 56 which is closest to the output of stage 2. All of the gates to which the outputs of the shift register are applied are maintained closed until they receive an output from the comparator 58, which occurs when it senses an identity of inputs.

The code character .desired to be typed is entered from the computer into the register 60. lAt the same time a signal from the computer is applied to a flip-flop 62 to drive it to its set state. The output of tiip-iop 62, when in its set stage, inserts a unique binary signal into the zero stage of the shift register 44, and also enables a gate 64 to commence applying clock pulses from a source 66 to a counter 68 and to the shift register 44 to cause it to commence shifting. The counter 68 starts counting from zero and continues counting until such time as the comparator 58 senses an identity between the count in the counter and the contents of the register l60. At this time the comparator 58 provides a output signal to the gates 52A, 52B each of which is associated with two stages of the shift register, as well as to the gate 52 shift. In addition the comparator output resets the Hip-flop 62 whereupon a reset pulse source 67 is energized to reset the counter 68. By this time, one of the gates 52A, 52B, 52C, etc., as well as the gate -52 shift has energized the one of the solenoids 42A, 42B 42 shift which is connected tothe shift register stage in which the unique binary signal is stored at the time the comparator output has occurred. Thus the one of the typewriter keys a, b, c z and/or shift which is associated with the code initially entered into the register 60 is operated and thetypewriter prints the corresponding character.

The output of the comparator is also fed back to the computer signaling to it that the decoding operation has been completed and the next code character is to be entered into the register 60. Suitable provision may be made to clear the shift register 44 as well as the register 60 by a signal from the computer just prior to entering the new code character into the register 60.

Accordingly, there has been described and shown herein a novel, useful and simplified arrangement for encoding a character selected on a typewriter keyboard by actuating a key into a code form suitable for use in a computer. The reciprocal process has also been described. While the foregoing description of the coder-decoder of this invention has been made in association with a typewriter, those skilled in the art will readily appreciate that its utility is more widespread and that other devices may be used to supply data to the shift register for encoding and to receive decoded data therefrom. Thus, for exarr1- ple, each stage of the register may be associated with each hole position of a punched card. Each stage of the register may be selected by a different code, etc. Therefore, the` foregoing description of the utility with a typewriter is illustrative and not restrictive.

The following is claimed as new:

1.. Apparatus for generating a code representation of each one of the characters associated with a typewriter key responsive to the actuation of said typewriter key comprising a shift register having a plurality of stages each one of said stages being associated with a different one of a set of typewriter keys, means responsive to the actuation of a `typewriter key to enter a signal into the associated shift register stage, a counter, a source of clock pulse signals, means responsive to the actuation of one of said typewriter keys for applying said clock pulse signals to said shift register to shift the contents thereof serially and to said counter to cause it to advance, gate means connected to the output end of said shift register for sensing the appearance of said signal previously stored in the associated stage of said shift register and producing an output, and means responsive to said gate means output for terminating further application of said clock pulses to said shift register and to said counter whereby the count in said counter is an encoded representation of the character associated with the actuated typewriter key.

2. Apparatus for providing code representations of -the keys on a typewriter comprising a shift register having a plurality of stages, a different one of said stages being associated vwith a different one of said typewriter keys, means responsive to actuation of one of said typewriter keys for entering a binary signal into the associated one of said shift register stages, a counter, a source of clock pulses, means responsive to said typewriter key being actuated for applying pulses from said source to said counter and to said shift register to simultaneously cause said counter to commence counting and said shift register to commence shifting, gate means connected to the last stage of said shift register for sensing the presence of said binary signal therein and to provide an output signal indicative thereof, means responsive to said gate means output signal for terminating the further application of pulses to said shift register and to said counter, and means responsive to the output of said gate means for reading out the count of said counter.

3. Apparatus for providing a code representation of the upper case and lower case characters shown on each typewriter key and wherein for selecting the upper case character a shift key is actuated, said apparatus comprising a shift register having a plurality of stages, a different two of which are associated with each key of a typewriter, a first of said associated two stages being further associated with the lower case character and the second of two associated stages being associated with the upper case character, means responsive to the operation of a key on said typewriter for entering a binary signal into the two associated shift register stages, a counter, a source of clock pulse signals, means responsive -to the actuation of a key on said typewriter for applying signals from said clock pulse source to said shift register and to said counter for simultaneously shifting said shift register and advancing the count of said counter, gate means connected to the final stage of said shift register for sensing the appearance of a binary signal and for providing an output indicative thereof, means responsive to the output of said gate means for terminating the further application of clock pulses `to said counter and to said shift register, and means responsive to the actuation of said shift key for enabling response to said output signal only upon the occurrence of the binary signal placed in the second of said associated stages.

4. Apparatus for converting items of data in a first form into a second form where each item has at least one representation and at least one item has a plurality of representations, said apparatus comprising first means for serially providing items of data in said first form and for also providing along with each item having a plurality of representations an indication as to which representation the item corresponds,

a source of timing pulses,

second means responsive to said pulses and to each item provided by said first means for producing an output for each of the possible representations of the item, each output occurring after a predetermined number of said pulses have been applied to said first means, said predetermined number being unique for each representation,

counting means responsive to said pulses for providing outputs in said second form,

third means for resetting said counting means to a starting count for each item to be converted,

fourth means for controlling the time of application of said pulses to said first means and to said counting means,

fifth means for terminating the further application of said pulses to said counting means in response to an output from said second means, said starting count and the manner of counting provided by said count- 8 ing means in response to said pulses being chosen in corresponds to the representation indicated by said conjunction with the time of application of said indication. pulses provided by said fourth means and the pre- References Cited determined number of said pulses required by said UNITED STATES PATENTS second means to produce an output for each repre- 5 sentation so that the provision of an item by said 2'801406 7/1957 Lubkm 340-365 rst means in said first form is able to cause said 3064889 11/1962 HPPP' counting means to be terminated `by said lifth means 3102997 9/1963 Dlrks' at a count in said second form corresponding to the 3208046 9/1965 Young desired conversion, and sixth means operable in response to the indication prolo MAYNARD R* WILBUR Pnmary Examiner vided by said first means for permitting `said fifth J. GLASSMAN, Assistant Examiner means to yterminate the counting of said counting means only in response to the particular one of the U.S. Cl. X.R. plurality of outputs from said second means which 235-154 r 

